1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a nitride-based semiconductor device and a method of manufacturing the same.
2. Description of the Related Art
It is effective to use a material having high critical electric field to a power semiconductor device such as a switching device or high frequency power semiconductor device, so that a nitride-based semiconductor material having high critical electric field intensity is used.
As a nitride-based semiconductor device using a conventional nitride-based semiconductor material, a first conventional art has been known in which a carrier traveling layer composed of AlxGa1-xN (0≤X<1) film and a barrier layer composed of AlYGa1-YN ((0<Y≤1, X<Y) film are successively laminated, a gate electrode is formed near the central portion on the surface of the barrier layer having the same thickness, and a source electrode and a drain electrode are formed at the positions generally symmetric across the gate electrode.
The AlN film has a lattice constant smaller than that of the GaN film. Therefore, when the Al composition ratio in the barrier layer is greater than the Al composition ratio in the carrier traveling layer, the lattice constant of the barrier layer becomes small compared to the carrier traveling layer, so that a distortion is produced on the barrier layer. In the nitride-based semiconductor device, piezoelectric charge is produced in the barrier layer due to the piezo effect caused by the distortion in the barrier layer. A two-dimensional electron gas is generated at the interface between the carrier traveling layer and the barrier layer due to the generated piezoelectric charge.
When the GaN film having the Al composition of X=0 is used as the carrier traveling layer, and AlYGa1-YN film is used as the barrier layer, for example, the carrier density ns of the two-dimensional electron system to the film thickness d1 of the barrier layer is obtained from the following equation (1) (J. P. Ibbetson et al., “Polarization effects, surface states, and the source of electrons in AlGaN/GaN heterostructure field effect transistors”, Applied Physics Letters, 10 Jul. 2000, Vol. 77, No. 2, P. 250-252).ns=σPZ/ε×(1−Tc/d1) [cm−2]  (1)
Here, σPZ is a charge density of piezoelectric charge produced in the barrier layer, ε is a dielectric constant of the barrier layer, and d1 is the thickness of the barrier layer below the gate electrode. Further, Tc is a critical thickness of the barrier layer in which the carrier is generated. The critical thickness Tc is given by the following equation (2), and it shows a dependency to the Al composition.Tc=16.4×(1−1.27×Y)/Y[Å]  (2)
Further, a second conventional art has been known in which, in a nitride-based semiconductor device or gallium arsenide semiconductor device, a recess structure is formed by removing a part of the barrier layer in order to reduce the contact resistance at the source electrode and the drain electrode (for example, JP-A Nos. 2001-274375 and 2004-22774). In a heterojunction field-effect transistor (hereinafter referred to as HJFET) disclosed in JP-A No. 2001-274375, undoped aluminum nitride (AlN) buffer layer, undoped GaN channel layer, n-type AlGaN electron supplying layer, Si monoatomic layer, and n-type GaN cap layer are successively laminated on a sapphire substrate, in which a recess structure is formed by removing the n-type GaN cap layer at the position where the gate electrode is formed, the whole of the Si monoatomic layer and a part of the n-type AlGaN electron supplying layer. The gate electrode is formed at the recess structure, and the source electrode and the drain electrode are formed on the n-type GaN cap layer across the gate electrode. In this nitride-based semiconductor device, the AlGaN layer and the n-type GaN layer are formed between barrier layer and the source electrode/and the drain electrode, to thereby reduce the contact resistance of the source electrode and the drain electrode.
The HJFET disclosed in JP-A No. 2004-22774 has a structure such that a buffer layer composed of a semiconductor layer, GaN channel layer, AlGaN electron supplying layer, n-type GaN layer, and AlGaN layer are successively laminated on a sapphire substrate, in which a recess structure is formed by removing the AlGaN layer at the position where the gate electrode is formed, the whole of the n-type GaN layer and a part of the AlGaN electron supplying layer, the gate electrode is formed at the recess structure on the AlGaN electron supplying layer, and the source electrode and the drain electrode are formed on the AlGaN layer, that is the uppermost layer, across the gate electrode. In this nitride-based semiconductor device, the AlGaN layer and the n-type GaN layer are formed between the barrier layer and the source electrode/the drain electrode, to thereby reduce the contact resistance of the source electrode and the drain electrode.
In the nitride-based semiconductor devices disclosed in JP-A Nos. 2001-274375 and 2004-22774, the AlGaN electron supplying layer corresponds to the barrier layer, and the GaN channel layer below corresponds to the carrier traveling layer. Therefore, as explained in the first conventional art, piezoelectric charge is produced in the barrier layer, and hence, a two-dimensional electron gas is generated at the interface between the carrier traveling layer and the barrier layer. It should be noted that the carrier density of the two-dimensional electron system below the gate electrode in the nitride-based semiconductor device having the recess structure depends upon the Al composition of the barrier layer and the film thickness of the barrier layer below the gate electrode.
When the thickness of the barrier layer is not less than the critical thickness Tc given by the equation (2) in the nitride-based semiconductor device in which the gate electrode and the source and drain electrodes are formed on the barrier layer of the same thickness, the two-dimensional electron system having the uniform carrier density is formed at the interface between the carrier traveling layer and the barrier layer, as shown in the first conventional art. Therefore, the two-dimensional electron system is also formed at the interface between the carrier traveling layer and the barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode, whereby the on-resistance is reduced. However, the carrier density of the two-dimensional electron system is also finitely present below the gate electrode, so that the device becomes a normally on-type nitride-based semiconductor device.
On the other hand, when the thickness of the barrier layer is not more than the critical thickness Tc given by the equation (2), the carrier density of the two-dimensional electron system below the gate electrode becomes zero, so that the device becomes a normally off-type nitride-based semiconductor device. However, the carrier of the two-dimensional electron gas also becomes zero at the interface of the carrier traveling layer and the barrier layer between the gate electrode and the drain electrode and between the gate electrode and the source electrode, other than the portion below the gate electrode, with the result that the resistance between the drain electrode and the source electrode is increased, and hence, on-resistance is also increased. Specifically, it is difficult to fabricate, with good yield, the normally off-type nitride-based semiconductor device having reduced on-resistance in the nitride-based semiconductor device disclosed in the first conventional art.
On the other hand, when the thickness of the barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode is not less than the critical thickness Tc in the nitride-based semiconductor device in which the recess structure is formed by removing a part of the barrier layer in order to reduce the thickness of the barrier layer below the gate electrode, the two-dimensional electron system is formed at the interface of the carrier traveling layer and the barrier layer between the source electrode and the gate electrode and between the drain electrode and the gate electrode, as shown in the second conventional art. Therefore, the on-resistance is reduced. Further, when the thickness of the barrier layer below the gate electrode is not more than the critical thickness Tc, the carrier density of the two-dimensional electron system below the gate electrode becomes zero. Accordingly, the nitride-based semiconductor device disclosed in the second conventional art is made into a normally off-type nitride-based semiconductor device.
Meanwhile, considering the difference in energy of the conduction band of the carrier traveling layer and the barrier layer necessary for realizing the two-dimensional electron system, the Al composition ratio Y of the barrier layer is desirably not less than 0.2. In this case, the thickness of the barrier layer for making the carrier density below the gate electrode zero should be not more than about 60 [Å] from the equation (2). Therefore, in order to realize the normally off-type semiconductor device by using the recess structure, it is necessary to successively form the carrier traveling layer, barrier layer, and contact layer by using an epitaxial crystal growth apparatus, and then, to remove a part of the barrier layer to not more than 60 [Å] under a precise control. However, there arises a problem that it is difficult to fabricate a normally off-type semiconductor device with good yield in view of the processing precision.
Further, the threshold voltage in the nitride-based semiconductor device disclosed in the second conventional art becomes (carrier density of two-dimensional electron system below gate electrode)/(gate capacity per unit area), so that the threshold voltage Vth is given by the following equation (3).Vth=σPZ/ε×(d1−Tc)  (3)
Specifically, as shown in the equations (3) and (2), the threshold voltage Vth has a dependency to the Al composition ratio of the barrier layer and the thickness thereof. When the Al composition ratio Y of the barrier layer is 0.3, for example, even if processing is performed with relatively high precision such as 10 [Å] in the variation in the thickness of the barrier layer below the gate by the etching for forming the recess structure, the variation in the threshold voltage at this time becomes great such as 0.3 [V]. Accordingly, there arise a problem that it is difficult to fabricate a semiconductor device by controlling the threshold voltage with good yield.
The present invention has been achieved in order to solve the above problems. It is an object of this invention to provide, with good yield, a nitride-based semiconductor device in which a threshold voltage can easily be controlled and which has reduced on-resistance. Further, It is an object of this invention to also provide a normally off-type nitride-based semiconductor device having reduced on-resistance with good yield.